Minima margining is a unique sub-system IP approach to near-threshold voltage design. It combines hardware and software to provide dynamic margining for any digital logic. It allows the device to modify power usage during operation in response to performance needs, process variations and environmental conditions in real time. Dynamic voltage and frequency scaling (DVFS) enables low-power operations to take place at the lowest possible voltage in any given task, data or ambient condition.
Minima sub-system IP is a process and EDA -tool agnostic, it’s easy to integrate and can be tailored to fulfill customer application specific needs. It targets Ultra-Low Power MCUs like Arm Cortex-M series (M0 to M4), NXP Coolflux DSP -family and Tensilica DSP’s. Due the Minima Processor patented and silicon proven near-threshold voltage methodology, it’s possible to achieve even 15x energy efficiency in any digital logic.
Last updated 9.1.2019